游标法事件计时器

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Abstract According to the principle of Vernier Event Timer, a design scheme based on FPGA technique was given and the difficulties in the implement of this timer was analyzed.

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	Articles by authors
	Li Zhulian
	Guo Tangyong
	Xiong Yaoheng
	and Zhu Wei

Key words： vernier method event timer satellite laser ranging FPGA(Field Programmable Gate Array) technique time intrerval

Received: 01 January 1900

PACS:

TH762.2

Corresponding Authors: Li Zhulian

Cite this article:

Li Zhulian,Guo Tangyong,Xiong Yaoheng et al. VERNIER EVENT TIMER[J]. , 2007, 27(增刊): 101-102.

Li Zhulian,Guo Tangyong,Xiong Yaoheng et al. VERNIER EVENT TIMER[J]. jgg, 2007, 27(增刊): 101-102.

URL:

http://www.jgg09.com/EN/ OR http://www.jgg09.com/EN/Y2007/V27/I增刊/101

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